Hardware-Efficient Ansatz

Overview

Hardware-efficient ansatze (HEA) are variational circuits designed for NISQ devices, using native gate sets and respecting hardware connectivity constraints.

Property	Value
Category	Ansatz
Difficulty	Advanced
Framework	Cirq
Qubits	4
Depth	O(L × n)
Gates	RY, RZ, CZ

Structure

Each layer consists of:

Single-qubit rotations: RY(θ), RZ(φ) on each qubit
Entangling gates: CZ between qubit pairs

CODE
Layer k:
     ┌────────┐┌────────┐
q_0: ┤ RY(θ₀) ├┤ RZ(φ₀) ├──●──────────
     ├────────┤├────────┤  │
q_1: ┤ RY(θ₁) ├┤ RZ(φ₁) ├──●────●─────
     ├────────┤├────────┤       │
q_2: ┤ RY(θ₂) ├┤ RZ(φ₂) ├───────●──●──
     ├────────┤├────────┤          │
q_3: ┤ RY(θ₃) ├┤ RZ(φ₃) ├──────────●──
     └────────┘└────────┘

Entanglement Patterns

Linear

CODE
q_0 ─●───────────
     │
q_1 ─●─●─────────
       │
q_2 ───●─●───────
         │
q_3 ─────●───────

Circular

CODE
q_0 ─●─────────●─
     │         │
q_1 ─●─●───────│─
       │       │
q_2 ───●─●─────│─
         │     │
q_3 ─────●─────●─

Full

All-to-all connectivity (O(n²) gates)

Running the Circuit

PYTHON
from circuit import run_circuit

result = run_circuit(n_qubits=4, n_layers=3, entanglement='linear')

print(f"Parameters: {result['n_params']}")
print(f"Depth: {result['depth']}")
print(f"Gate counts: {result['gate_counts']}")

Expected Output

Metric	Linear	Circular	Full
CZ gates/layer	n-1	n	n(n-1)/2
Depth/layer	O(n)	O(n)	O(n²)
Expressibility	Medium	Higher	Highest

Parameter Count

CODE
n_params = n_layers × (n_qubits × 2) + n_qubits
         = n_layers × 2n + n

For n=4, L=3: 4×2×3 + 4 = 28 parameters

Trade-offs

Aspect	Shallow	Deep
Expressibility	Lower	Higher
Trainability	Better	Worse (barren plateaus)
Noise resilience	Better	Worse
Hardware compatibility	Better	Varies

Applications

VQE: Chemistry ground states
QAOA: Combinatorial optimization
QML: Classification/regression
Benchmarking: Hardware characterization